Yunsuk Cho email & phone information | Asic Design Verification Engineer, Engineering in Cisco

Yunsuk Cho

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Asic Design Verification Engineer, Engineering in Cisco

Senior Engineer, Engineering

Senior Design Verification Manager, Design in Marvell Semiconductor (2017-12 - 2018-04)

Staff Asic Design Verification Engineer, Engineering in Marvell Semiconductor (2015-09 - 2017-12)

Ì Ì in Stats Chippac (2016-06 - 2017-09)

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Taipei City, Taiwan, Taiwan

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y***@m******.com

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